MicroVAX 78032 (DC333) microprocessor

MicroVAX 78132 (DC337) FPU coprocessor

1 MByte local memory

64 KByte boot and diagnostic ROM

Console SLU (Serial Line Unit) UART (DC319 / DL11-compatible "DLART")

MicroVAX gate array with glue logic

Local memory interconnect data bus (32-bit wide plus 4-bit parity)

CD interconnect (back side) for the local memory address bus

Q-Bus / Q22-Bus (i.e. with a 22-bit address space)

MC146818 CMOS real-time clock (RTC) / time of year (TOY) clock (in DEC terms)

HM6264 8Kx8 SRAM for the Q-Bus Address Map aka Q-Bus scatter-gather map (using 512 byte pages)

When a Q-Bus device does DMA the upper 13 bits of the address (9-21, 0-indexed) are used as the address into this memory, the resulting 16-bit data word has one valid bit and 15 address bits; these become the upper 15 (9-23) address bits in the VAX memory space. Since this uses 512 byte pages (i.e. a 9-bit offset) this works out beautifully to map 22-bit Q-Bus addresses to 24-bit physical VAX addresses.

This performs effectively the function of an w:IOMMU.

See drawing 1.5 in M7606-0-0 (drawing no B-CS-M7606-0-27).